Parallel architectures today and tomorrow

Erik Hagersten
Department of Computer Systems (DoCS) at Uppsala University, Sweden.

Headlines for the tutorial

• Existing and emerging multiprocessor (MP) application areas
• Overview of memory models
• Overview of cache coherence techniques
• Classification of different MP architectures
• MPP, Clusters, SMP, NUMA, COMA, R-NUMA, multi-facial
• Servers -- more than just performance: RAS
• Overview of commercially available architectures
• Case study: small SMP
• Case study: large SMP
• Case study: self-optimizing COMA/NUMA
• Case study: multi-facial
• The market/economics of MP technologies

Abstract

Multiprocessor architecture is a classic research topic. New innovative architectures have been proposed over the past 40 years. Up until seven years ago small "start-up" companies, such as Thinking Machines, Kendall Square Research, Meiko, and Sequent, tried to make a living in the fragile and technology-savvy MP market. About five years ago, new application areas made multiprocessors very attractive in the commercial marketplace. Today, large companies like IBM, HP and Sun Microsystems are thriving in this market market while the "start-ups" all have disappeared.

This lecture will give an in-depth overview of several important MP techniques developed over the years. We will show pros and cons of the techniques and make a rough categorization of some existing commercial products. We will also take a snap-shot of todays research topics and trends. Finally, we will analyze what happened in the market and try to predict where multiprocessor research and products are heading in the future.

Erik Hagersten has been the Chief Architect for Sun's High-End Server Engineering division since the group joined Sun Microsystems from Thinking Machines in 1994. The group develops scalable technology for the technical and commercial marketplace, partly financed by a grant from Department of Energy's ASCI-pathforward program targeting a 100 Teraflop machine by 2004.

He has previous experience from high-end CPU design and large fault-tolerant systems at Ericsson and from applied computer architecture research in the Multiprocessor Emulation Facility project at MIT. During his five years in academia, he introduced the new architecture ideas Cache-Only Memory Architecture (COMA) and Simple COMA (S-COMA) while managing the computer system's research group at the Swedish Institute of Computer Science (SICS). He is a co-inventor of the communication paradigm "DTM" that led to the two start-up companies Net Insight and Dynarc.

Erik was recently appointed professor in computer architecture at Uppsala University, Sweden. He is the author of about 75 academic papers and patents. He holds an MS in Electrical Engineering and a PhD in Computer Science, both from the Royal Institute of Technology (KTH) in Stockholm.