FlexCore: Utilizing Exposed Datapath Control for Efficient Computing
Martin Thuresson, Chalmers
We introduce the FlexSoC processor paradigm, where an exposed processor pipeline and a generalized
interconnect allow efficient usage of datapath components. We describe the FlexCore, the first processor
designed according to the FlexSoC principles. Microbenchmarks yield a performance boost of a factor of
2 over a traditional five-stage pipeline with the same functional units as the FlexCore.
We describe our approach to compiling for the FlexCore. The generalized interconnect allows the Flex-
Core datapath to be dynamically reconfigured as a consequence of code generation. Additionally, specialized
functional units may be introduced and utilized within the same architecture and compilation framework.
The exposed datapath requires a wide control word. To reduce instruction bandwidth and memory footprint,
the FlexSoC compilation approach includes a compression procedure, where the wide-word native instructions
are compacted into application-specific instructions which are stored in memory and expanded when executed.
